Re: [cc65] rodata alignment independent from ld.cfg

On Fri, Jan 14, 2011 at 02:47:59PM +0100, Ullrich von Bassewitz wrote:
> On Wed, Jan 12, 2011 at 09:46:31PM +0100, Thomas Giesel wrote:
> > Is there a way to put data in rodata on an aligned address without
> > having an aligned rodata segment?
> 
> No. While the linker determines the placement of a segment, it cannot change
> the size. Which means that the linker cannot add or remove fill bytes to force
> an alignment within a segment. Fill bytes must be added by the assembler,
> which must rely on an aligned start address.

Actually it caused me some headache even if I totally understand why the
linker is the one who must know it, so you must put these things into
separate segments or so with the proper alignment specified in the linker
config file.  However: I had problem with DTV, where you can enable "burst
mode", when the ASIC core can read 4 bytes at once, thus it's much faster. 
However you must optimize your code then, it's important not to break too
much 4 byte boundaries especially if it's a time critical thing like in the
middle of a loop (it can be faster to insert some NOPs, even if it sounds
odd - at least as far as I understood Jeri's explanation).  It's quite
impossible to create new segments for this, since it would mean to use
hundreds of segments if I want to optimize my code well.  However even if I
know the theory behind the reason (why ca65/ld65 work this way) I have no
idea how to solve these kind of problems too much.  Currently I've given up
my ideas to optimize my code for DTV this way because of these problems.  Do
you have any idea what can I do instead of just giving up?  :)

thanks, regards;

- Gábor
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