Hi! On Sun, Dec 04, 2005 at 02:40:16PM +0100, Gábor Lénárt wrote: > However the problem is here. Let's see for example the following Z80 ops: > > RET > RET Z > JR label > JR Z,label > CALL label > CALL Z,label > > Ones with 'Z' are conditioned opcodes (Z is the condition here, other one > can stay here as well). At the level of CPU opcodes there are simply another > opcodes. Now how can I parse the source? Determining the addressing mode is done in one of the ea... modules. You would have to write such a module for the Z80. Making the condition code specifiers reserved words in the scanner is possible, and probably the best idea. > But I don't want to mess up the whole > source without asking first the "best" solution for the problem of support > of a totally different CPU from the already-well-supported 65xx ones int > ca65. Since Z80 differs from these CPUs a lot, I guess I've got quite big > change in tokenizer and such, and I don't want it, if you won't accept my > code because of its uglyness. There are also 65xx CPUs that need other reserved identifiers, the 65CE02 for example has a Z register. If this is of any help, I can add the necessary hooks in the scanner for CPU dependent reserved identifiers. Regards Uz -- Ullrich von Bassewitz uz@musoftware.de ---------------------------------------------------------------------- To unsubscribe from the list send mail to majordomo@musoftware.de with the string "unsubscribe cc65" in the body(!) of the mail.Received on Sun Dec 4 22:23:54 2005
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