Re: [cc65] macro arguments

On Sunday 25 April 2004 10:30, Ullrich von Bassewitz wrote:

> Since they're undocumented, I would prefer something less official, like a
> macro package. If I remember correctly, not more than one or two of these
> undocumented instructions are actually useful.

oh well.. 

     ANC   Accu AND with memory, copy accu-bit 7 to carry
     ARR   Accu AND with memory, ROR accu
     ASR   Accu AND with memory, LSR accu
     DCP   DEC memory, CMP memory
     ISB   INC memory, SBC memory
     LAX   LDA memory, TAX
     NOP   No operation (various variants that take different amount of cycles)
     RLA   ROL memory, AND accu, result into accu
     RRA   ROR memory, ADC accu, result into accu
     SAX   Accu AND with X-Register, result into memory
     SBC   Subtract memory from accumulator with borrow (one byte version of sbc#$ff)
     SBX   X-Register AND with accu, SBC memory, result into X-Register
     SLO   ASL memory, ORA accu, result into accu
     SRE   LSR memory, EOR accu, result into accu

all stable (work on all known mask variants of the 6510) and all more or
less useful.

tjam whatever - i couldnt care less if these would be supported by a macro
package or directly by the assembler... but i'd like them supported right
now (need LAX ! :o)). and since creating an additional table for the 6510 from
the existing table for the 6502 is probably much less work than adding the
needed functionality in the macros (although i would prefer the later) i
would think that adding a 6510-cpu is a good idea. (also for other reasons, the
6510 _is_ a different cpu afterall).

gpz

btw while we are at it....the macro functionality in question is also needed to
finish (finalize) my works for pcengine so it can be included in the libs....
(or again, adding a HuC6280 cpu might be the more accurate solution here too :=P)


i would even volunteer to create those two tables and create a patch for the
assembler etc....cant be terribly hard :=P

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